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 APV2002
Crystal Oscillator
Features
* * * * * * * * * * * * *
Single Chip XO Up to 60MHz Square Wave Load Capacitors Build-in Feedback Resistor Build-in 3-State Output High Reliability CMOS/TTL Input Level CMOS/TTL Output Duty Level Fundamental Oscillator Frequency Divider Build-in 2.7V to 5.5V Supply Voltage High Stability Against Noise on VDD
General Description
The APV2002 is a CMOS IC that integrates all circuit components required for a oscillator. It is a low cost, low jitter, high performance oscillator, which consists of low-current oscillator circuit and output buffer. The IC also incorporates a high-precision, thinfilm feedback resistor and load capacitors with excellent frequency characteristics. It also offers frequency divider for application flexibility choice.
Pin Assignment
XTB
1 8
XT OE VDD
Chip Form and SOP-8 Package Available
S0 S1 GND
2 7
APV 2002
3 6
4
5
QO
SOP - 8
Ordering Information
APV2002
Lead Free Code Handling Code Temp. Range Package Code Package Code K : SOP-8 Y : CHIP FORM Temp. Range I : -40 to 85C Handling Code TU : Tube TY : Tray TR : Tape & Reel W : Wafer Lead Free Code L : Lead Free Device Blank : Original Device
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.3 - Nov., 2002 1 www.anpec.com.tw
APV2002
Pin Description
P in 1 2 3 4 5 6 7 8 Sym bol XTB S 0 (N o te 1 ) S1 GND QO VDD O E (N o te 2 ) XT F u n c tio n C ry s ta l d riv e F re q u e n c y s e le c t p in 1 F re q u e n c y s e le c t p in 2 G ro u n d F re q u e n c y o u tp u t Pow er O u tp u t e n a b le C ry s ta l fe e d b a c k
N o te 1 : P le a s e re fe r fre q u e n c y s e le c to r N o te 2 : H ig h o r n o c o n n e ctio n : e n a b le , L o w : d is a b le
Electrical Characteristics
The following specifications apply for VDD = 5V unless otherwise noted.
Symbol Parameter Test Condition Min. 4.5 -40 0.5 Crystal 50MHz , CL = 50pF -0.5 -0.5 40 0.5V to 4.5V , CL = 50pF 4.5V to 0.5V , CL = 50pF 50 3 3 APV2002 Typ. 5 Max. 5.5 85 60 20 VDD+0.5V VDD+0.5V 60 Unit
Operating condition VDD Supply Voltage Ambient Temperature DC characteristics Freq IDD VIN VOUT Duty Tr Tf Crystal Frequency Operating Current Input Voltage Output Voltage Waveform Symmetry Rise Time Fall Time
V C
MHz mA
AC characteristics % ns ns
Copyright ANPEC Electronics Corp. Rev. A.3 - Nov., 2002
2
www.anpec.com.tw
APV2002
Electrical Characteristics (Cont.)
The following specifications apply for VDD = 3.3V unless otherwise noted.
Symbol Parameter Test Condition Min. 3.0 -40 0.5 Crystal 55MHz , CL = 50pF -0.5 -0.5 40 0.3V to 3.0V , CL = 50pF 3.0V to 0.3V , CL = 50pF 50 3 3 APV2002 Typ. 3.3 Max. 3.6 85 60 20 VDD+0.5V VDD+0.5V 60 Unit
Operating condition VDD Supply Voltage Ambient Temperature DC characteristics Freq IDD VIN VOUT Crystal Frequency Operating Current Input Voltage Output Voltage Waveform Symmetry Rise Time Fall Time
V C MHz mA
AC characteristics Duty Tr Tf % ns ns
Copyright ANPEC Electronics Corp. Rev. A.3 - Nov., 2002
3
www.anpec.com.tw
APV2002
Pad Layout
1 2 11 10
3
9
4
8
7 5 6
Pad Description
Pad # 1 2 3 4 5 6 7 8 9 10 11 Symbol XTB OE S0 S1 GND C/T (Note3) QO NC (Note4) VDD OE XT Description Crystal drive Output enable Frequency select pad1 Frequency select pad2 Ground Duty cycle modulation Frequency output Reserve Power Output enable Crystal feedback
Note3 : C/T-no connection or connect to VDD for above 30Meg XO; connect to GND for below 30Meg XO. Note4 : NC-no connection
Frequency Selector
S1 X X O O S0 X O X O QO Default 2O 4O 8O
Note5 : X-no connection , O-connect to GND Note6 : This function for die use only
Copyright ANPEC Electronics Corp. Rev. A.3 - Nov., 2002
4
www.anpec.com.tw
APV2002
Pad Position
Y
1 2
11 10
3
9
4
8
7 5 6
x (0 ,0 )
Die Size = 716.5um * 821.5um Pad Size = 86um * 86um Die Thickness = 250um
Pad # 1 2 3 4 5 6 7 8 9 10 11
Note8 : VDD and GND are double pads.
Symbol XTB OEPAD S0PAD S1PAD GND TCBPAD QO NC VDD OEPAD XT
Pad Center X(um) 260 78 78 78 225,321 468 638 638 638,638 638 449 Y(um) 743 700 531 359 78,78 78 163 356 457,553 700 743
Note7 : Substrate should be connected to GND.
Copyright ANPEC Electronics Corp. Rev. A.3 - Nov., 2002
5
www.anpec.com.tw
APV2002
Packaging Information
SOP-8 pin ( Reference JEDEC Registration MS-012)
E
H
e1 D
e2
A1
A
1 L
0.004max.
Dim A A1 D E H L e1 e2 1
Mi ll im et er s Min. 1. 35 0. 10 4. 80 3. 80 5. 80 0. 40 0. 33 1. 27B S C 8 Max . 1. 75 0. 25 5. 00 4. 00 6. 20 1. 27 0. 51 Min. 0. 053 0. 004 0. 189 0. 150 0. 228 0. 016 0. 013
0.015X45
Inche s Max . 0. 069 0. 010 0. 197 0. 157 0. 244 0. 050 0. 020 0. 50B S C 8
Copyright ANPEC Electronics Corp. Rev. A.3 - Nov., 2002
6
www.anpec.com.tw
APV2002
Physical Specifications
Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
TP
(IR/Convection or VPR Reflow)
tp C ritical Zone T L to T P
R am p-up
T e m p e ra tu re
TL T sm ax
tL
T sm in R am p-down ts Preheat
25
t 25 C to Peak
T im e
Classificatin Reflow Profiles
Profile Feature Sn-Pb Eutectic Assembly Large Body Small Body Pb-Free Assembly Large Body Small Body 3C/second max. 150C 200C 60-180 seconds 3C/second max 217C 60-150 seconds 245 +0/-5C 250 +0/-5C 10-30 seconds 20-40 seconds
Average ramp-up rate 3C/second max. (TL to TP) Preheat - Temperature Min (Tsmin) 100C - Temperature Mix (Tsmax) 150C - Time (min to max)(ts) 60-120 seconds Tsmax to TL - Ramp-up Rate Tsmax to TL - Temperature(TL) 183C - Time (tL) 60-150 seconds Peak Temperature(Tp) 225 +0/-5C 240 +0/-5C Time within 5C of actual Peak 10-30 seconds 10-30 seconds Temperature(tp) Ramp-down Rate 6C/second max. 6 minutes max. Time 25C to Peak Temperature
Copyright ANPEC Electronics Corp. Rev. A.3 - Nov., 2002 7
6C/second max. 8 minutes max.
www.anpec.com.tw
Note: All temperatures refer to topside of the package. Measured on the body surface.
APV2002
Reliability test program
Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245C, 5 SEC 1000 Hrs Bias @125C 168 Hrs, 100%RH, 121C -65C~150C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA
Carrier Tape
t P P1 D
Po E
F W
Bo
Ao
Ko D1
T2
J C A B
T1
Application
A 330 1
B 62 +1.5 D
C 12.75+ 0.15 D1
J 2 0.5 Po
T1 12.4 0.2 P1 2.0 0.1
T2 2 0.2 Ao 6.4 0.1
W 12 0. 3 Bo 5.2 0. 1
P 8 0.1 Ko
E 1.750.1 t
SOP- 8
F 5.5 1
1.55 +0.1 1.55+ 0.25 4.0 0.1
2.1 0.1 0.30.013
(mm)
Copyright ANPEC Electronics Corp. Rev. A.3 - Nov., 2002 8 www.anpec.com.tw
APV2002
Cover Tape Dimensions
Application SOP- 8 Carrier Width 12 Cover Tape Width 9.3 Devices Per Reel 2500
Customer Service
Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369
Copyright ANPEC Electronics Corp. Rev. A.3 - Nov., 2002
9
www.anpec.com.tw


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